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MC9S08AC60破解——飞思卡尔MC9S08解密
分类:MC9S08芯片解密 | 发布:chaoban | 查看: | 发表时间:2010-11-23
MC9S08AC60单片机解密是橙盒科技成功破解的典型单片机,依靠在芯片解密技术研究领域的丰富成果,橙盒科技目前可为广大客户提供MC9S08系列大部分典型单片机解密服务,且解密可靠性强,价格合理。
MC9S08AC60系列单片机特性:
8-Bit HCS08 Central Processor Unit (CPU)
40-MHz HCS08 CPU (central processor unit)
20-MHz internal bus frequency
HC08 instruction set with added BGND instruction
Development Support
Background debugging system
Breakpoint capability to allow single breakpoint setting during in-circuit debugging (plus two more breakpoints in on-chip debug module)
On-chip in-circuit emulator (ICE) Debug module containing two comparators and nine trigger modes. Eight deep FIFO for storing change-of-flow addresses and event-only data.
Supports both tag and force breakpoints.
Support for up to 32 interrupt/reset sources
Memory Options
Up to 60 KB of on-chip FLASH memory with security options
Up to 2 KB of on-chip RAM
Clock Source Options
Clock source options include crystal, resonator,external clock, or internally generated clock with precision NVM trimming using ICG module
System Protection
Optional watchdog computer operating properly (COP) reset with option to run from independent 1kHz internal clock source or bus clock
Low-voltage detection with reset or interrupt
Illegal opcode detection with reset
Cyclic Redundancy Check (CRC) Module to support fast cyclic redundancy checks on memory.
Power-Saving Modes
Wait plus two stops
Peripherals
ADC — Up to 16-channel, 10-bit analog-to-digital converter with automatic compare function
SCI — Two serial communications interface modules with optional 13-bit break. supports LIN 2.0 Protocol and SAE J2602; Master extended break generation; Slave extended break detection
SPI — Serial peripheral interface module
IIC — Inter-integrated circuit bus module to operate at up to 100 kbps with maximum bus loading; capable of higher baudrates with reduced loading. 10-bit address extension option.
Timers — Up to two 2-channel and one 6-channel 16-bit timer/pulse-width modulator (TPM) module:Selectable input capture, output compare, and edge-aligned PWM capability on each channel.Each timer module may be configured for buffered, centered PWM (CPWM) on all channels
KBI — Up to 8-pin keyboard interrupt module
CRC - Hardware CRC generation using a 16-bit shift register
Input/Output
Up to 54 general-purpose input/output (I/O) pins
Software selectable pullups on ports when used as inputs
Software selectable slew rate control on ports when used as outputs
Software selectable drive strength on ports when used as outputs
Master reset pin and power-on reset (POR)
Internal pullup on RESET, IRQ, and BKGD/MS pins to reduce customer system cost
Package Options
64-pin quad flat package (QFP)
64-pin low-profile quad flat package (LQFP)
48-pin quad flat pack no lead package (QFN)
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