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　　Figure 1-1 illustrates the major components of the CY8C34
　　family. They are:
　　8051 CPU Subsystem
　　Nonvolatile Subsystem
　　Programming, Debug, and Test Subsystem
　　Inputs and Outputs
　　Clocking
　　Power
　　Digital Subsystem
　　Analog Subsystem
　　PSoC’s digital subsystem provides half of its unique configurability.
　　It connects a digital signal from any peripheral to any
　　pin through the Digital System Interconnect (DSI). It also
　　provides functional flexibility through an array of small, fast, low
　　power Universal Digital Blocks (UDBs). PSoC Creator provides
　　a library of pre-built and tested standard digital peripherals
　　(UART, SPI, LIN, PRS, CRC, timer, counter, PWM, AND, OR,
　　and so on) that are mapped to the UDB array. The designer can
　　also easily create a digital circuit using boolean primitives by
　　means of graphical design entry. Each UDB contains Programmable
　　Array Logic (PAL)/Programmable Logic Device (PLD)
　　functionality, together with a small state machine engine to
　　support a wide variety of peripherals.
　　In addition to the flexibility of the UDB array, PSoC also provides
　　configurable digital blocks targeted at specific functions. For the
　　CY8C34 family these blocks can include four 16-bit timer,
　　counter, and PWM blocks; I2C slave, master, and multi-master;
　　Full-Speed USB; and Full CAN 2.0b.
　　For more details on the peripherals see the “Example Peripherals”
　　section on page 35 of this data sheet. For information on
　　UDBs, DSI, and other digital blocks, see the “Digital Subsystem”
　　section on page 35 of this data sheet.
　　PSoC’s analog subsystem is the second half of its unique configurability.
　　All analog performance is based on a highly accurate